Video display systems based on spatial light modulators (SLMs) are increasingly being used as an alternative to display systems using cathode ray tubes (CRTs). SLM systems provide high-resolution displays without the bulk and power consumption of CRT systems. As used for image display applications, SLMs include arrays of micro-mirrors that reflect light to an image plane. These micro-mirrors are often referred to as picture elements or “pixels”, as distinguished from the pixels of an image. This use of terminology is typically clear from context, so long as it is understood that more than one pixel of the SLM array may be used to generate a pixel of the displayed image.
Digital micro-mirror devices (DMDs) are a type of SLM, and may be used for either direct-view or projection display applications. A DMD has an array of hundreds or even thousands of micro-mechanical pixels, each having a tiny mirror that is individually addressable by an electronic signal. Depending on the state of its addressing signal, each pixel tilts so that it either does or does not reflect light to the image plane.
Generally, projecting an image from an array of pixels is accomplished by loading memory cells connected to the pixels. Once each memory cell is loaded, the corresponding pixels are reset so that each one tilts in accordance with the ON or OFF state of the data in the memory cell. For example, to produce a bright spot in the projected image, the state of the pixel may be ON, such that the light from that pixel is directed out of the SLM and into a projection lens. Conversely, to produce a dark spot in the projected image, the state of the pixel may be OFF, such that the light is directed away from the projection lens.
To achieve intermediate levels of illumination, between white (ON) and black (OFF), pulse-width modulation (PWM) techniques may be employed. The basic PWM scheme involves first determining the rate at which images are to be presented to the viewer. This establishes a frame rate and a corresponding frame-time or frame period. For example, in many modern television systems images are transmitted at 60 frames per second (i.e., 60 Hz), and each frame lasts for approximately 16.67 milliseconds. Then, the intensity resolution for each pixel is established. In a simple example, and assuming n bits of resolution, the frame-time is divided into 2n-1 equal time slices. For a 16.67 millisecond frame period and n-bit intensity values, the time slice is 16.67/(2n-1) milliseconds.
Having established these times, for each frame of the desired image pixel intensities are quantized, such that black is 0 time slices, which is the intensity level represented by the least significant bit (LSB). The LSB is the least amount of illumination intensity from the DMD and is 1 time slice, while maximum brightness, e.g., the most significant bit (MSB), is 2n-1 time slices. Each pixel's quantified intensity determines its on-time during a frame period. Thus, during a frame period, each pixel with a quantized value of more than 0 is ON for the number of time slices that correspond to its intensity. The viewer's eye integrates the pixel brightness so that the image appears as if it were generated with analog levels of light.
For generating color images with SLMs, one approach is to use three DMDs, one for each primary color of red, green, and blue (RGB). The light from corresponding pixels of each DMD is converged so that the viewer perceives the desired color. Another approach is to use a single DMD and a color wheel having sections of primary colors. Data for different colors is sequenced and synchronized to the color wheel so that the eye integrates sequential images into a continuous color image. Another approach uses two DMDs, with one switching between two colors and the other displaying a third color. Of course, other approaches are also being employed.
For addressing SLMs, PWM calls for the data to be formatted into “bit-planes,” each bit-plane corresponding to bit-weights of intensity values. Thus, if each pixel's intensity is represented by an n-bit value, each frame of data has n bit-planes. Each bit-plane has a 0 or 1 value for each display element. In the simple PWM example described above, during a frame period, each bit-plane is separately loaded and the pixels are addressed according to their associated bit-plane values. For example, the bit-plane representing the LSBs of each pixel is displayed for 1 time slice, whereas the bit-plane representing the MSBs is displayed for 2n/2 time slices. Because a time slice is only 16.67/(2n-1) milliseconds, the SLM must be capable of loading the LSB bit-plane (which is the shortest bit-plane) within that time. The time for loading the LSB bit-plane is the “peak data rate.” In conventional systems, when the LSB is less than the load-time of the DMD, then that bit cannot be used and image quality and efficiency suffers.
U.S. Pat. No. 5,278,652, entitled “DMD Architecture and Timing for Use in a Pulse-Width Modulated Display System,” which is commonly assigned with the present disclosure and incorporated hereby by reference, describes PWM for addressing a DMD in a DMD-based display system. It is directed to “global reset” methods, where bit-plane data is loaded during the preceding display time of another bit-plane. To begin the display time, the pixels of the entire array are reset simultaneously. Another method of SLM addressing is “divided” or “phased” reset addressing. With this approach, the pixels are divided into groups, but each pixel has its own memory cell. After the memory cells of one group are loaded with their data from a bit-plane, memory cells of a next group are loaded with their data. This continues until all groups have been loaded with data for the same bit-plane. Such “phased” loading is followed by a “phased reset” so that all groups consecutively begin their display of the bit-plane. Such a method is described in U.S. Pat. No. 6,201,521, entitled “Divided Reset for Addressing Spatial Light Modulator”, which is commonly assigned with the present disclosure and incorporated hereby by reference in its entirety.
Unfortunately, when phased reset techniques are employed to operate the pixels in distinct groups, “reset conflicts” will typically occur. A reset conflict occurs when reset signals in any two or more groups of pixels overlap in time. Specifically, each reset command for a block requires a predetermined amount of time to complete before another block may be reset. As such, several techniques are available to overcome or avoid these conflicts, and should be employed when possible to help ensure the display system operates at peak efficiency. However, even when employing available conflict resolution techniques, not all potential conflicts may be prevented, depending on the bit-plane values and arrangement of bit segments in each bit sequence. Moreover, when short bit segments are present in the sequence, the likelihood that the resets for the shorter segments will cause a conflict increases since shorter bit segments require resetting sooner, and thus more often, than longer bit segments. As a result, such conventional resolution techniques may be even more ineffective when short bit segments are employed.